Lead Chip Validation Engineer

@VMware
  • Bengaluru, Karnataka, India View on Map
  • Post Date : July 21, 2025
  • Salary: ₹450,000.00 - ₹3,000,000.00 / Yearly
  • View(s) 168
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Job Detail

  • Job ID 57020

Job Description

We are seeking a highly experienced and results-driven Lead Chip Validation Engineer to join our high-performance silicon engineering team. This role is ideal for professionals with strong hands-on experience in PCIe Gen5/Gen6 validation, embedded firmware debug, and complex mixed-signal hardware. The selected candidate will play a key role in ensuring first-silicon success of cutting-edge semiconductor designs. You will lead and execute silicon validation across pre- and post-silicon phases, work closely with hardware, firmware, and software teams, and own the debug, bring-up, and validation strategy for high-performance chips.

Key Responsibilities:

  • Plan and execute silicon validation strategies for next-generation semiconductor products.
  • Develop detailed validation schedules, define test plans, and coordinate execution across teams.
  • Lead validation of PCIe Gen5/6 interfaces, high-speed analog/mixed-signal blocks (PLLs, SERDES, ADCs), and multi-clock/reset domain logic.
  • Perform hardware bring-up, debug hardware-software integration issues, and support board-level/system-level validation.
  • Collaborate with hardware, firmware, and driver teams to isolate and root cause issues.
  • Utilize scripting (Perl, TCL, shell scripts) to automate testing and manage regression environments.
  • Analyze compliance with standards (PCIe, IEEE 802.3 Ethernet) and ensure robustness of physical layer implementations.
  • Contribute to the development of SystemVerilog/UVM-based validation environments and reusable test components.
  • Drive issue resolution across cross-functional teams and maintain ownership of validation deliverables.
  • Mentor junior engineers, promote best practices, and introduce modern validation techniques to improve efficiency and coverage.

Required Qualifications:

  • Bachelor’s or Master’s degree in Electrical or Computer Engineering (BSEE/MSEE).
  • 8+ years of hands-on experience in chip validation, silicon bring-up, and test development.
  • Proven expertise in validating PCIe Gen5/6, Ethernet PHY (IEEE 802.3), and SERDES-based interfaces.
  • Strong programming skills in C/C++, SystemVerilog, and Object-Oriented Programming.
  • In-depth experience in firmware, driver, and microcontroller-based SoC debug and integration.
  • Familiarity with testbench development using UVM or equivalent environments.
  • Skilled in scripting languages like PERL, TCL, Shell for automation and data analysis.
  • Deep understanding of PLL, CDR, AMS, and analog/digital interface validation is a strong plus.
  • Solid debugging expertise in RTL (Verilog/VHDL), hardware boards, and system software.
  • Ability to work independently and across global time zones, with strong communication and leadership skills.

Preferred Skills:

  • Experience in high-speed analog validation, jitter analysis, and eye diagram interpretation.
  • Familiarity with silicon failure analysis, debug probes, and lab equipment like oscilloscopes, logic analyzers.
  • Working knowledge of regression management tools, Git, Jenkins, or similar CI/CD workflows.
  • Understanding of signal integrity, board layout considerations, and compliance testing methodologies.

Why Join Us?

  • Work on next-gen, high-performance silicon solutions shaping future technologies.
  • Collaborate with world-class engineering teams in a dynamic, innovative environment.
  • Grow in a role that blends technical leadership, hands-on engineering, and cross-functional impact.

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